In a typical packet processing system, packets originating from various source locations are received via one or more communication interfaces. Each packet contains routing information, such as a destination address and other information. The packet processing system reads the routing information of each received packet and forwards the packet to an appropriate communication interface for further transmission to its destination. At times, for instance because of packet data traffic patterns and volume, the packet processing system may need to store packets in a memory until the packets can be forwarded to their respective outgoing communication interfaces. Some memory space that is located in relative close proximity to a packet processing core of the packet processing system, is limited in size, is relatively low latency and is comparatively expensive. Conversely, other memory space that is located relatively far away from the packet processing core typically has the potential of being significantly larger than memory space that is located in close proximity to the packet processing system. However, while the other memory space is comparatively less expensive it also exhibits relatively high latency.
The description above is presented as a general overview of related art in this field and should not be construed as an admission that any of the information it contains constitutes prior art against the present patent application.